Probe card will allow cost-effective wafer testing and facilitate advanced packaging of different dies for an improved device performance
In order to address the wafer test challenges of 2.5/3D advanced packaging technologies, FormFactor, a semiconductor test and measurement supplier, has introduced the Altius vertical MEMS probe card that can support ultra-low force probing at 45 µm grid-array contact pitch for future IC package pitch reduction.
The probe card will enable cost-effective wafer or die test of a variety of components in a heterogenous integrated system, such as validating the at-speed performance of high bandwidth memory (HBM) and ensuring the integrity of high-density interconnects like silicon interposers and embedded bridges.
Improved device performance
Advanced packages will facilitate the heterogeneous integration of multiple different dies through high-density interconnects, for improved device performance and smaller footprint. Advanced packaging architectures can help meet the demands for greater connectivity, computing power, speed, and cost-effectiveness in applications such as 5G, IoT, and artificial intelligence.
“Advanced packaging and heterogeneous integration raise the bar for wafer test; increasing both complexity and coverage. The contact pattern for wafer probe is generally two to four times denser than a monolithic die and higher quality test is required to ensure a bad chip does not ‘kill’ several otherwise good chips in the same advanced package,” said Mike Slessor, CEO of FormFactor. “The Altius probe card, with its scalable MEMS probe technology, helps accelerate our customers’ yield improvement on these new manufacturing processes while meeting their aggressive pitch reduction roadmaps.”
The Altius probe card’s core capabilities include:
- Minimum grid-array pitch of 45 µm
- Ultra-low probe force for direct probing on copper through silicon vias or solder microbumps, ~1 gram per probe at operating overtravel with best-in-class contact resistance stability
- Support for HBM known-good-die or known-good-stack test, >=3 Gbps test speed
- Scalable for multi-site test to increase throughput, X4 capable for HBM
- Configurable with Hybrid MEMS probes for mixed-pitch microbump layout